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Mentor's new analog fastspice extreme technology improves verification performance by 10 times

China industrial control information mentor's new analog fastspice extreme technology improves verification performance by 10 times

mentor analog fastspice platform provides innovative functions that can significantly accelerate the nano-scale verification of simulated design after large wiring

mentor, a Siemens business recently announced that its analog fastspice platform has made significant progress, The introduction of the revolutionary analog fastspice extreme technology for large-scale post layout simulation design greatly improves the simulation performance, while helping to maintain the wafer foundry certification accuracy required for nano scale simulation verification

analog fastspice extreme is particularly important for analog design with high parasitic complexity and large contact resistance. With the continuous reduction of process size, the above problems are becoming more and more serious. According to the initial customer benchmark comparison results, compared with mentor's previous generation of analog fastspice products, the simulation performance of the new technology has been improved by 10 times, and has been improved by 3 times compared with commercial solutions with similar accuracy settings

Randy Caplan, executive vice president of silicon creations, said: we are committed to providing world-class chip IP for high-performance clocks (such as PLL) and low-power/high-speed data interfaces (such as SerDes). Most advanced chip level systems adopt our design. Therefore, we need to support the latest 3nm FinFET process. The top priority is to be able to quickly and accurately simulate FinFET design, To meet our urgent schedule. We participated in the early test plan of analog fastspice extreme technology through several large post wiring designs, and the results show that the technology improves the speed by 10 times while maintaining the precision of spice level. We expect to use analog fastspice to verify our full extraction design, which can meet the goal of high performance and high yield of analytical instruments in Jinan. At the same time, we can complete the chip design at one time

mentor analog fastspice platform can provide fast circuit verification for nano analog, radio frequency (RF), mixed signal, memory and customized digital circuits. The platform has passed the 5nm Process Certification of the wafer factory, and is trusted and applied by many of the most successful analog integrated circuit designs in the world. Its speed of providing nano spice accuracy is twice as fast as that of using the simulator after crushing like parallel spice1

analog fastspice customers can now use the new analog fastspice extreme technology for free, so as to bring more performance advantages to their large-scale post cabling analog design. Analog fastspice extreme adopts an innovative resistance capacitance (RC) circuit reduction algorithm, which significantly improves the performance of the core spice matrix solution of analog fastspice. In addition, it also includes a comprehensive device noise analysis function, which can support chip level accuracy simulation

Mahesh tirupattur, executive vice president of analog bits, said: analog bits is a leading supplier of mixed signal IP, providing a wide range of product portfolios including low-power SerDes, phase locked loops, sensors and i/o, and supporting the latest 3nm FinFET process. We have long-term cooperation with mentor and its analog fastspice platform, and participated in the early test plan of AFS extreme. We have strict accuracy requirements for low-power integrated timing and interconnection IP technology, which requires normal operation The post wiring parasitic effect of FinFET design should be considered in order to more accurately represent the real analog circuit response. Analog fastspice extreme technology can improve performance six times while maintaining the spice accuracy required for nano scale simulation verification. Mentor and analog fastspice will continue to provide innovative spice technology for current and future designs

analog fastspice extreme is a supplement to the mentor Symphony mixed signal platform, which uses analog fastspice circuit simulator and provides fast and accurate mixed signal verification through the industry standard HDL simulator. Symphony platform provides an intuitive and easy-to-use use mode for the verification of complex nanoscale mixed signal IC, with powerful debugging function and configuration support

with the continuous and in-depth development of analog, mixed signal and RF design to new nano nodes, designers all over the world are expecting that circuit simulation performance can be significantly improved without affecting the accuracy of advanced nodes. Dr. Ravi Subramanian, senior vice president of mentor IC Verification solutions, said that in overcoming the important characteristics of microcomputer controlled impact testing machine, our circuit simulation research and development team has always adhered to innovation in the process of overcoming each challenge of advanced nodes. Analog fastspice extreme will be an important milestone to open the next chapter of our technology evolution

mentor graphics Corporation, a business of Siemens, has the world's leading electronic hardware and software design solutions, and is committed to providing products, consulting services and high-quality support to the world's most successful electronic, semiconductor and system enterprises. The company is headquartered in Oregon. For more details, please visit:

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